Wong C.C., Chang H.C. Turbo decoder architecture for beyond-4G applications

Springer New York, 2014. — 100 p.Turbo code is one of the error-correcting techniques of the standards for 4G telecommunication system. From current development trend, there is a growing demand for faster data transmission; therefore, the throughput of turbo decoder should be raised to support the next-generation application. The common way to reach this objective is using parallel architecture. However, it causes increasing complexity and decreasing efficiency. These problems will limit the achievable improvement. The aim of this book is to resolve the two design issues, and our main emphasis is on the practical turbo decoders for 3GPP LTE-Advanced and IEEE 802.16m standards. Chapter 1 gives an overview of the code specifications, theoretical principles, and essential algorithms. Then Chap. 2 introduces basic functional units and main processor of a conventional turbo decoder. It further indicates the architecture with superior performance and reasonable overhead. Next, Chap. 3 illustrates the characteristics of advanced parallel architecture and explains the negative effects on complexity and efficiency. There are several implementation results supporting the introductions in Chaps. 2 and 3. All of them are derived with 90 nm technology. Chapter 4 presents how to simplify the parallel turbo decoder, while Chap. 5 shows how to get a better utilization of the component circuits.
Moreover, the last two chapters highlight the conditions in which these proposed methods are suitable to use. With the materials of this book, the readers would learn about choosing the decoder architecture that can fulfill their requirements.