Springer, 2011. — 205 p.This work is an attempt to provide background of a typical video coding block and the associated design consideration and methodology for realizing such block in VLSI circuits. Readers may find this book helpful in how an algorithm can be mapped onto the corresponding circuits, and the trade-offs between implementing and not implementing an algorithm in hardware. In this book, the entropy coding tools adopted by the H.264/AVC video compression standard are presented in both algorithms and VLSI architectures. The book has two parts. Part A includes a brief background on video compression, in which entropy compression is an influential and interdependent component; introduction to the CAVLC and CABAC algorithms and their respective realized VLSI architectures. Part B comprises a design flow for a typical CABAC coder, with performance complexity analysis, design methodology, design consideration, and power reduction techniques. A WISHBONE system bus interface is also integrated into the design to enhance the portability of the CABAC encoder in a SoC-based video coding system.Background on Video Coding and Entropy Coding Introduction to Video Compression Review of CAVLC, Arithmetic Coding, and CABAC Review of Existing Statistical Codec Designs Design of a Typical Entropy Coder Design of a CABAC Encoder Efficient Architecture for Context Modeling in the CABAC Encoder Design of System Bus Interface and Inter-connection of SoC-Based CABAC Encoder Circuit Design, Implementation, and Verification of CABAC Encoder Power Reduction Strategies, MBIST, and Design Performance Comparison Conclusions
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